SMI interrupts on x86

The x86 platform is not optimized for real-time usage. Real-time behavior of a system depends a lot on low latency interrupt handling.

System Management Interrupt (SMI) on Intel x86 ICH chipsets

System Management Interrupts are being generated by the power management hardware on the board. SMI’s are evil if real-time is required. They can last for hundreds of microseconds and they are the highest priority interrupt in the system. You can’t intercept the SMI because when the CPU gets an SMI it goes into a special mode and jumps to a hard-wired location in a special SMM address space (which is probably in BIOS ROM).

Although SMI interrupts are handled by 1 processor at a time, it even effects real-time responsiveness on multi-core systems, because the core handling the SMI interrupt may have locked a mutex or spinlock which is needed by some other core.

Getting rid of SMI interrupts on x86

1. Use PS/2 mice and keyboard
2. Disable USB mouse and keyboard settings in BIOS
3. Compile an ACPI-enabled Kernel
4. Disable TCO timer generation of SMIs
   (TCO_EN bit in the SMI_EN register)

Do not ever disable the SMI interrupts globally

Disabling SMI may cause your CPU to burn up if SMI is disabled. SMIs are also used to fix up chip bugs, so certain components may not work as expected when SMI is disabled.

Posted by admica   @   2 April 2009

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